Major refactor of codebase

include/sys/acpi.h

@@ -0,0 +1,196 @@
+#include <stdint.h>
+#include <stdbool.h>
+typedef struct rsdp_t {
+    uint64_t signature;
+    uint8_t checksum;
+    uint8_t oemid[6];
+    uint8_t revision;
+    uint32_t rsdt_address;
+
+    uint32_t length;
+    uint64_t xsdt_address;
+    uint8_t ext_checksum;
+    uint8_t reserved[3];
+} __attribute((packed)) rsdp_t;
+
+typedef struct desc_header_t {
+    uint8_t signature[4];
+    uint32_t length;
+    uint8_t revision;
+    uint8_t checksum;
+    uint8_t oemid[6];
+    uint8_t oem_tableid[8];
+    uint32_t oem_revision;
+    uint32_t creator_id;
+    uint32_t creator_revision;
+} __attribute((packed)) desc_header_t;
+
+typedef struct rsdt_t {
+    desc_header_t header;
+    uint32_t entries_base[];
+} __attribute((packed)) rsdt_t;
+
+typedef struct xsdt_t {
+    desc_header_t header;
+    uint64_t entries_base[];
+} __attribute((packed)) xsdt_t;
+
+typedef struct ics_t {
+    uint8_t type;
+    uint8_t length;
+}__attribute((packed)) ics_t;
+
+typedef struct madt_t {
+    desc_header_t header;
+    uint32_t lic_address;
+    uint32_t flags;
+    ics_t ics[];
+} __attribute((packed)) madt_t;
+
+typedef struct lapic_ao_t {
+    ics_t ics;
+    uint16_t reserved;
+    uint64_t lapic_address;
+}__attribute((packed)) lapic_ao_t;
+
+typedef struct gas_t {
+    uint8_t address_space_id;
+    uint8_t reg_bit_width;
+    uint8_t reg_bit_offset;
+    uint8_t access_size;
+    uint64_t address;
+}__attribute((packed)) gas_t;
+
+typedef struct hpet_t {
+    desc_header_t header;
+    uint32_t event_timer_blkid;
+    gas_t base_address;
+    uint8_t hpet_number;
+    uint16_t minimum_clk_tick;
+    uint8_t oem_attribute;
+}__attribute((packed)) hpet_t;
+
+typedef struct ioapic_t{
+    ics_t ics;
+    uint8_t ioapic_id;
+    uint8_t reserved;
+    uint32_t ioapic_address;
+    uint32_t gsi_base;
+}__attribute((packed)) ioapic_t;
+
+typedef struct iso_t{
+    ics_t ics;
+    uint8_t bus;
+    uint8_t source;
+    uint32_t gsi;
+    uint16_t flags;
+}__attribute((packed)) iso_t;
+
+/* Copied from OSDEV wiki */
+typedef struct fadt_t{
+    desc_header_t header;
+    uint32_t FirmwareCtrl;
+    uint32_t Dsdt;
+
+    // field used in ACPI 1.0; no longer in use, for compatibility only
+    uint8_t  Reserved;
+
+    uint8_t  PreferredPowerManagementProfile;
+    uint16_t SCI_Interrupt;
+    uint32_t SMI_CommandPort;
+    uint8_t  AcpiEnable;
+    uint8_t  AcpiDisable;
+    uint8_t  S4BIOS_REQ;
+    uint8_t  PSTATE_Control;
+    uint32_t PM1aEventBlock;
+    uint32_t PM1bEventBlock;
+    uint32_t PM1aControlBlock;
+    uint32_t PM1bControlBlock;
+    uint32_t PM2ControlBlock;
+    uint32_t PMTimerBlock;
+    uint32_t GPE0Block;
+    uint32_t GPE1Block;
+    uint8_t  PM1EventLength;
+    uint8_t  PM1ControlLength;
+    uint8_t  PM2ControlLength;
+    uint8_t  PMTimerLength;
+    uint8_t  GPE0Length;
+    uint8_t  GPE1Length;
+    uint8_t  GPE1Base;
+    uint8_t  CStateControl;
+    uint16_t WorstC2Latency;
+    uint16_t WorstC3Latency;
+    uint16_t FlushSize;
+    uint16_t FlushStride;
+    uint8_t  DutyOffset;
+    uint8_t  DutyWidth;
+    uint8_t  DayAlarm;
+    uint8_t  MonthAlarm;
+    uint8_t  Century;
+
+    // reserved in ACPI 1.0; used since ACPI 2.0+
+    uint16_t BootArchitectureFlags;
+
+    uint8_t  Reserved2;
+    uint32_t Flags;
+
+    // 12 byte structure; see below for details
+    gas_t ResetReg;
+
+    uint8_t  ResetValue;
+    uint8_t  Reserved3[3];
+  
+    // 64bit pointers - Available on ACPI 2.0+
+    uint64_t                X_FirmwareControl;
+    uint64_t                X_Dsdt;
+
+    gas_t X_PM1aEventBlock;
+    gas_t X_PM1bEventBlock;
+    gas_t X_PM1aControlBlock;
+    gas_t X_PM1bControlBlock;
+    gas_t X_PM2ControlBlock;
+    gas_t X_PMTimerBlock;
+    gas_t X_GPE0Block;
+    gas_t X_GPE1Block;
+
+    gas_t sleep_ctrl_reg;
+    gas_t sleep_status_reg;
+
+    uint64_t hypervisor_vendor_id;
+    
+    uint8_t wbinvd;
+    uint8_t wbinvd_flush;
+
+    uint8_t proc_c1;
+    uint8_t p_lvl2_up;
+    uint8_t pwr_button;
+    uint8_t slp_button;
+    uint8_t fix_rtc;
+    uint8_t rtc_s4;
+    uint8_t tmr_val_ext;
+    uint8_t dck_cap;
+
+
+}__attribute((packed)) fadt_t;
+
+typedef struct conf_space_t {
+    uint64_t base_ecm;
+    uint16_t pci_seg_group;
+    uint8_t start_pci_num;
+    uint8_t end_pci_num;
+    uint32_t reserved;
+}__attribute((packed)) conf_space_t;
+
+typedef struct mcfg_t {
+    desc_header_t header;
+    uint64_t reserved;
+    conf_space_t conf_spaces[];
+}__attribute((packed)) mcfg_t;
+
+void acpi_init(void);
+uint64_t *find_acpi_table(char *signature);
+uint64_t *find_ics(uint64_t type);
+uint32_t find_iso(uint8_t legacy);
+
+
+

include/sys/pci.h

@@ -0,0 +1,102 @@
+#include <stdbool.h>
+#include <stdint.h>
+void pci_init();
+
+typedef struct pci_header_t {
+    uint16_t vendor_id;
+    uint16_t device_id;
+    uint16_t command;
+    uint16_t status;
+    uint8_t revision_id;
+    uint8_t prog_if;
+    uint8_t subclass;
+    uint8_t class_code;
+    uint8_t cache_line_size;
+    uint8_t latency_timer;
+    uint8_t header_type;
+    uint8_t bist;
+}__attribute((packed)) pci_header_t;
+
+typedef struct pci_header_0_t {
+    pci_header_t header;
+    uint32_t bar0;
+    uint32_t bar1;
+    uint32_t bar2;
+    uint32_t bar3;
+    uint32_t bar4;
+    uint32_t bar5;
+    uint32_t cardbus_cis_ptr;
+    uint16_t subsytem_vendor_id;
+    uint16_t subsystem_id;
+    uint32_t expansion_rom_base;
+    uint8_t capabilities_ptr;
+    uint8_t reserved1;
+    uint16_t reserved2;
+    uint32_t reserved3;
+    uint8_t interrupt_line;
+    uint8_t interrupt_pin;
+    uint8_t min_grant;
+    uint8_t max_latency;
+}__attribute((packed)) pci_header_0_t;
+
+typedef struct pci_header_1_t {
+    pci_header_t header;
+    uint32_t bar0;
+    uint32_t bar1;
+    uint8_t primary_bus_number;
+    uint8_t secondary_bus_number;
+    uint8_t subordinate_bus_number;
+    uint8_t secondary_latency_timer;
+    uint8_t io_base;
+    uint8_t io_limit;
+    uint16_t secondary_status;
+    uint16_t memory_base;
+    uint16_t memory_limit;
+    uint16_t prefetch_base_;
+    uint16_t prefetch_limit;
+    uint32_t prefetch_base_upper;
+    uint32_t prefetch_limit_upper;
+    uint16_t io_base_upper;
+    uint16_t io_limit_upper;
+    uint8_t capability_ptr;
+    uint8_t reserved1;
+    uint16_t reserved2;
+    uint32_t expansion_rom_base;
+    uint8_t interrupt_line;
+    uint8_t interrupt_pin;
+    uint16_t bridge_control;
+}__attribute((packed)) pci_header_1_t;
+
+typedef struct pci_header_ahci_t {
+    pci_header_t header;
+    uint32_t bar[4];
+    uint32_t ahci_bar;
+    uint16_t subsystem_id;
+    uint16_t subsytem_vendor_id;
+    uint32_t expansion_rom_base;
+    uint8_t capabilities_ptr;
+    uint16_t interrupt_info;
+    uint8_t min_grant;
+    uint8_t max_latency;
+
+}__attribute((packed)) pci_header_ahci_t;
+
+/* For internal use */
+typedef struct l84_pci_function_return {
+    bool multi; // If device has multiple functions this is set to 1, else set to 0. If set to 0, functions index 1-7 are ignored
+    uint64_t func_addr[8];
+} l84_pci_function_return;
+
+typedef struct pci_structure {
+    uint16_t segment;
+    uint8_t bus;
+    uint8_t device;
+    uint64_t func_addr[8];
+} pci_structure;
+
+l84_pci_function_return check_device(uint64_t bus, uint64_t device);
+
+uint64_t get_header(uint64_t bus, uint64_t device, uint64_t function);
+
+pci_header_t *pci_find_device(uint64_t class, int subclass);
+

include/sys/rand.h

@@ -0,0 +1,3 @@
+#include <stddef.h>
+void krand_init();
+size_t rand(void);